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Please use this identifier to cite or link to this item:
http://hdl.handle.net/1974/7167
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This item is restricted and will be released 2017-04-29.
| Title: | Digital Control of Phase Staggered Multiple ZVS Inverters for Grid-connected Photovoltaic Systems |
| Authors: | GUPTA, VIDISHA |
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| Keywords: | Photovoltaic Systems
Microinverters
Renewable Energy
Soft Switching |
| Issue Date: | 30-Apr-2012 |
| Series/Report no.: | Canadian theses |
| Abstract: | The grid connected PV plants comprising of the PV cells and the power electronic inverters are a widely used technology in distributed power generation systems based on renewable energy sources. Microinverters form an extensive part of the ongoing research in this field. This thesis focuses on the inverter section of the microinverter. The cost and efficiency of the grid connected inverter is a chief contributing factor in the overall system price.
The MOSFETs used in the DC/AC inverter are usually hard switched causing a lot of EMI noise and losses in the inverter. This is true for both, single and three phase inverters. A low switching frequency is desirable to increase the efficiency, which in turn imposes a large compromise in designing the output filter. In this thesis, switching losses have been minimized by incorporating zero voltage switching at switch turn on and variable dead-time control at switch turn off. The soft switching technique is based on control algorithms and involves no use of any auxiliary circuit. Also, the size of the output filter is reduced without increasing the switching frequency, by employing multiple paralleled inverters. The interleaving technique that is usually used in dc/dc converters is extended for dc/ac inverters and is well employed to maintain the quality of the current fed into the utility grid. In this way, at low switching frequency, high efficiency and reduced cost and sizes are achieved.
The study is validated through simulation and lab experiments. The novel control circuit was first implemented using analog circuitry. After assessing the performance of the analog version of the proposed controller, it was then digitally implemented through the Field Programmable Gate Array (FPGA) technique. |
| Description: | Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2012-04-30 15:06:26.071 |
| URI: | http://hdl.handle.net/1974/7167 |
| Appears in Collections: | Queen's Theses & Dissertations
Electrical and Computer Engineering Graduate Theses
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