Asynchronous Complementary Dual Channel Current Source Gate Driver for Synchronous Buck Converters
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Currently there is a push for higher switching frequency DC-DC converters, especially in mobile and computer applications. Higher frequency operation allows for better transient performance and a reduction in the size of magnetic components. This leads to converters with a higher power density. However, certain challenges arise from operating at higher switching frequencies. Focusing on the Synchronous Buck Converter, efficiency may be degraded due to higher switching loss, higher diode conduction loss, and higher gate drive loss. To increase efficiency, different gate drive configurations have been designed with the goal of minimizing losses for MOSFETs being switched at high frequencies. Higher efficiency operation at higher frequencies can be accomplished with resonant gate drives, which include an inductor in the gate drive. The advantages may include: a high, constant gate current that enables faster switching and the possibility to return gate drive current to the source as opposed to ground. However, few gate drives are able to capture both these advantages – the ones that do suffer from other disadvantages such as high component counts, high complexity, and high conduction loss in the gate drive. An Asymmetric Complementary Dual Channel Current Source Driver is proposed in this thesis specifically designed for a Synchronous Buck Converter. Merits include: a constant, high gate current used to switch the Control MOSFET and Synchronous MOSFET; discharging the MOSFETs to the source, reducing gate drive losses; lower component count than other designs; and lower conduction loss due to reduced precharge and discharge intervals versus other designs. There are two sides to the gate drive: one driving the Control MOSFET, the other driving the Synchronous MOSFET. A coupled inductor links the two sides of the gate drive and transfers charge between the gates of the MOSFETs. The proposed gate drive is specifically designed to maximize efficiency when applied to a Synchronous Buck Converter. The efficiency is verified and compared via analysis and simulation, the operation of the gate drive was verified via simulation and experimentally.
URI for this recordhttp://hdl.handle.net/1974/24316
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