Design of Low-Voltage and Low-Distortion CMOS RF Integrated Circuits Using Volterra Analysis

Abstract

Analog circuits that operate with low voltage supply headroom generally suffer from poor linearity performance, poor noise performance, etc. However, with the aggressive scaling of the supply voltage in Complementary Metal Oxide Semiconductor (CMOS) technology and the advent of System-On-Chip (SOC) technologies, it is inevitable that these circuits are to be operated with low voltage supply headroom. In this thesis, three low-voltage Integrated Circuits (IC) for Radio Frequency (RF) communication systems are presented. They are all designed and fabricated with 0.13um CMOS technology. Their experimental verifications are performed on die with Coplanar Waveguide (CPW) probes.

The first circuit is an ultra-low-voltage low-power single-balanced $\times$2 subharmonic down-conversion mixer. A linearity analysis for the inductive source degenerated transconductor of the mixer is provided using Volterra series. This analysis provides a guideline for designing the inductive source degenerated transconductor with high linearity at the RF frequency of 8.6 GHz. The circuit achieves a conversion gain of 6.0 dB and an $IIP_{3}$ of -8.0 dBm at the RF frequency of 8.6 GHz while consuming 0.6 mW of DC power with the supply voltage of 0.6 V.

The second circuit is a low-voltage low-noise wideband down-conversion mixing frontend that consists of a Low-Noise Amplifier (LNA) and a passive mixer. The linearity analysis for the LNA, which is used as a transconductor, is analyzed using Volterra series. Through this analysis, the trade-off between noise cancellation and distortion cancellation is discussed. A simple distortion cancellation scheme that decouples the design guidelines from this trade-off is proposed. From 300 MHz to 1.2 GHz, the circuit achieves a conversion gain of 8.8 dB and a maximum $IIP_{3}$ of -0.8 dBm, while having less than 4.8 dB noise figure. The overall circuit consumes 24.0 mW of power with the supply voltage of 0.9 V.

The third circuit is a low-voltage low-noise wideband active balun. The linearity analysis for the active balun circuit is also analyzed using Volterra series. The design consideration involving noise cancellation and distortion cancellation is discussed through this analysis. A simple distortion cancellation scheme that aims at improving the linearity performance of the circuit with low-voltage supply constraint is proposed. From 300 MHz to 2.4 GHz, the circuit achieves an average voltage gain of 15.5 dB and a maximum $IIP_{3}$ of -1.7 dBm, while having less than 4.0 dB noise figure from 500 MHz to 3.0 GHz. The overall circuit consumes 15.8 mW of power with the supply voltage of 0.9 V.