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dc.contributor.authorAytimur, Cenken
dc.date2013-10-31 14:48:27.422
dc.date.accessioned2013-10-31T19:24:09Z
dc.date.available2013-10-31T19:24:09Z
dc.date.issued2013-10-31
dc.identifier.urihttp://hdl.handle.net/1974/8447
dc.descriptionThesis (Master, Electrical & Computer Engineering) -- Queen's University, 2013-10-31 14:48:27.422en
dc.description.abstractNoise radar systems have become more prevalent over the past couple of decades due to their superior performance over conventional continuous-wave and pulsed-wave radar systems in certain applications. However, one limiting factor of noise radar systems has been the generation of ultrabroadband waveforms. This thesis proposes a novel application of programmable pseudo-random bit generators (PRBGs) for use in noise radar applications. A long-sequence high-speed PRBG was designed using a low-cost and low-power complementary metal oxide semiconductor (CMOS) technology. The proposed circuit has a sequence length of approximately 4.3 Gbits and was designed to operate at 1 GHz providing a data rate of 1 Gbit/s. This new waveform generation technique would eliminate the requirement of a large variable delay-line (transmission-line) and reduce the power required by noise radar systems. It would allow such systems to become much more compact and create the opportunity for the move towards hand-held devices. It would further allow easier implementation of bistatic radar systems where the transmitting and receiving sites are physically far from one another. In addition, this programmable long-sequence PRBG could have applications in cryptology, communications, and other areas where the generation of high-speed random bit sequences is paramount. Unfortunately, an ASIC (application specific integrated circuit) design process documentation error rendered the fabricated IC's unusable. The error was caused by not enabling the input pads of the IC, which required an undocumented edit to the gate-level design file generated by Synopsys \textit{Design Vision}. Consequently, the circuit had to be realized on a field-programmable gate array (FPGA), which performed as expected, albeit at a lower frequency of 50 MHz. The PSD of the FPGA implementation created the expected output of a sinc-squared function with the first null at the clock frequency. This result proves that a LFSR PRBG is a viable noise source for use in noise radar systems.en
dc.language.isoengen
dc.relation.ispartofseriesCanadian thesesen
dc.rightsThis publication is made available by the authority of the copyright owner solely for the purpose of private study and research and may not be copied or reproduced except as permitted by the copyright laws without written authority from the copyright owner.en
dc.subjectPseudo-Random Bit Generatoren
dc.subjectDigital Systemsen
dc.subjectNoise Radaren
dc.subjectIntegrated Circuitsen
dc.titleDesign and Implementation of a Programmable Digital Pseudo-Random Bit Generator for Applications in Noise Radaren
dc.typethesisen
dc.description.degreeM.A.Sc.en
dc.contributor.supervisorFreundorfer, Alois P.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.degree.grantorQueen's University at Kingstonen


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